Architecture/Functional block diagram of 8279 Programmable Keyboard

8279 Programmable Keyboard acts as an input device contains maximum of 64 keys. With the help of keyboard the user can perform various types of tasks. Certain specific key-codes are used where text is entered as an input with the keyboard. The main function is to act as an interface with the CPU with the help of these key-codes. These key-codes are de-bounced and can be stored in an 8-byte character FIFORAM, which can be accessed by the CPU. If more than 8 characters are entered in the FIFO, then it indicates more than eight keys are pressed at a time. Then the overrun is set.
If a FIFO contains a valid key entry, then the CPU is interrupted in an interrupt mode and checks the status in polling to read the entry. Once the CPU completes to read a key entry, then FIFO gets updated, and the key entry that has been read is pushed out of the FIFO in order to produce space for new entries.

Architecture and Description

8279_archi

I/O Control and Data Buffer

This unit controls the data flow through the microprocessor. It is enabled only when D is low. Its data buffer interfaces the external bus of the system with the internal bus of the microprocessor. The pins are being available in the form of A0, RD, and WR are used for command, status or data read/write operations.

Control and Timing Register and Timing Control

This unit contains registers which stores the keyboard, display modes, and other operations that are programmed by the CPU. The timing and control unit holds the specific timings to perform the operation of the circuit.

Scan Counter

Scan counter consists of two modes i.e. Encoded mode and Decoded mode. In the encoded mode, the counter supplies the binary count where it has to be decodes externally in order to provide the scan lines for the keyboard and display.
In the decoded scan mode, the counter internally decodes the least significant 2 bits and provides a decoded 1 out of 4 scan on SL0-SL3.

Return Buffers, Keyboard Debounce, and Control

This unit which has buffers, keyboard debounce etc first scans the key that is close in row-wise, if found then the keyboard debounce unit debounces the key entry. In case, if the same key is detected, key- code of that key is directly shifted to the sensor RAM along with SHIFT & CONTROL key status.

FIFO/Sensor RAM and Status Logic

This unit acts as 8-byte first-in-first-out (FIFO) RAM where the key code of every pressed key is entered into the RAM according to their sequence. The status logic helps in producing an interrupt request after each FIFO read operation till the FIFO gets empty.
In the scanned sensor matrix mode, this unit acts as sensor RAM where its each row is loaded with the current status of their corresponding row of sensors into the matrix. When the sensor changes its state, the IRQ line changes to high and enters into the interrupt mode of the CPU.

Display Address Registers and Display RAM

This unit consists of display address registers which handles the addresses of the currently read word /written by the CPU to/from the display RAM.

8279 − Pin Description

The following figure shows the pin diagram of 8279 −

8279_pin

Data Bus Lines, DB0 – DB7

These are 8 bidirectional data bus lines used to transfer the data to/from the CPU.

CLK

The clock input is used to generate internal timings required by the microprocessor.

RESET

As the name suggests this pin is used to reset the microprocessor.

CS Chip Select

When this pin is set to low, it allows read/write operations , otherwise this pin should be set to high.

A0

This pin indicates the command transfer/status information. When it is low, it indicates the transfer of data.

RD, WR

This Read/Write pin enables the data buffer to send/receive data over the data bus.

IRQ

This interrupt output line raises high when data is there in the FIFO sensor RAM. The interrupt line becomes low with each FIFO RAM read operation. However, if the FIFO RAM further remains any key-code entry to be read by the CPU, this pin again goes high to generate an interrupt to the CPU.

Vss, Vcc

These are the ground and power supply lines of the microprocessor.

SL0 − SL3

These are the scan lines which help to scan the keyboard matrix and display the digits. As mentioned earlier these lines can be programmed as encoded or decoded, using the mode control register.

RL0 − RL7

These are the Return Lines which are connected to one terminal of keys, while the other terminal of the keys is connected to the decoded scan lines. These lines are set to 0 when any key is pressed.

SHIFT

The Shift input line status is stored along with every key code in FIFO in the scanned keyboard mode. When it is pulled low with a key closure, it is pulled up internally to keep it high

CNTL/STB – CONTROL/STROBED I/P Mode

In the keyboard mode, this line is used as a control input and stored in FIFO that 8 bit character type on a key closure. The line is considered as a strobe line that enters the data into FIFO RAM, in the strobed input mode. It also has an internal pull up. The line is pulled down with a key closure.

BD

It stands for blank display. It is used to blank the display during digit switching.

OUTA0 – OUTA3 and OUTB0 – OUTB3

These are the output ports for two 16×4 or one 16×8 internal display refresh registers. The data from these lines got to be synchronized with the scan lines in order to scan the display and the keyboard.

Operational Modes of 8279

There are two modes of operation on 8279 − Input Mode and Output Mode.

Input Mode

This mode deals with the input given by the keyboard and this mode is further classified into 3 modes.
  • Scanned Keyboard Mode − In this mode, the key matrix can be connected using either encoded or decoded scans. In the encoded scan, an 8×8 keyboard or in the decoded scan, a 4×8 keyboard can be interfaced. The key that consists code is pressed with SHIFT and CONTROL status is stored into the FIFO RAM. The FIFO can store 8 keyboards in the scan keyboard mode.
  • Scanned Sensor Matrix − In this mode, a processor is used to interface the sensory array using either encoder or decoder scans. In the encoder scan, 8×8 sensor matrix or with decoder scan 4×8 sensor matrix can be interfaced. If the condition os any of the switches or keys changes then 8279 is set to high to interrupt the processor.
  • Strobed Input − In this mode, when the control line is set to 0, the data on the return lines is stored in the FIFO byte by byte.

Output Mode

This mode deals with display-related operations. This mode is further classified into two output modes.
  • Display Scan − This mode allows 8/16 character multiplexed displays to be organized as dual 4-bit/single 8-bit display units.
  • Display Entry − This mode allows data entry for display either from the right side/left side.
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